Similar Items: An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline
- Accelerating software radio astronomy FX correlation with GPU and FPGA co-processors
- FPGA-Based Deep Learning Processor: A Review
- High throughput pipelined implementation of SHA3 hash algorithm on FPGA
- Radiation tolerant implementation of a soft-core processor for space applications
- First Fully Pipelined High Throughput FPGA Implementation and GPU Optimization of Wider Variant of AES
- Self-Healing Many-Core Architecture: Analysis and Evaluation
Author: Inggs, Michael
- A reconfigurable accelerator card for high performance computing
- Design and implementation of a digital real-time secondary surveillance radar/identification friend or foe target emulator
- Study on the detection performance of MIMO radar systems
- Helicopter blade parameter extraction for purposes of radar target indentification
- Investigation into standardising the graphical and operator input device modules for tactical command and control man-machine interfaces
- A parallel processing framework for spectral based computations