Similar Items: A reconfigurable array processor
- The design and testing of a superconducting programmable gate array
- Identifying worst case test vectors for FPGA exposed to total ionization dose using design for testability techniques
- Development of superconducting field-programmable gate array and supporting EDA software
- A mass memory system for satellites using field programmable gate arrays and synchronous DRAM
- The implementation of a microprocessor in a FPGA
- An FPGA-based adaptive forward error correction protocol for cubeSats
Author: Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering.
Author: Bakkes, P. J.
- Aspects affecting the design of a low earth orbit satellite on-board computer
- Development of a memory-module for the SUNSAT micro-satellite
- The development of an ARM-based OBC for a nanosatellite
- Feasibility of the PowerPc 603ETM for a LEO satellite on-board computer
- A second generation SUNSAT RAMDISK
- The design of a CMOS sensor camera system for a nanosatellite