Skip to content
<title>Channels - Determinisability of register and timed automata :: FRELIP Discovery
Home
Search
Guides
Journals
Learning
FRELIP Discovery Search
Open Access Catalog for African Scholarship
Channels
Determinisability of register and timed automata
Search for more channels:
Similar Items: Determinisability of register and timed automata
Channel Options
View Record
Explore related channels
Quick Look
History-Register Automata
Quick Look
Bisimilarity in fresh-register automata
Quick Look
Alternating register automata on finite words and trees
Quick Look
Register Automata with Extrema Constraints, and an Application to Two-Variable Logic
Quick Look
Stochastic Timed Automata
Quick Look
Register Games
Quick Look
Sampled Semantics of Timed Automata
Quick Look
Weak Alternating Timed Automata
Quick Look
History-deterministic Timed Automata
Quick Look
Hyper-Minimization for Deterministic Register Automata
Quick Look
Reachability and liveness in parametric timed automata
Quick Look
Parametric updates in parametric timed automata
Quick Look
Avoiding Shared Clocks in Networks of Timed Automata
Quick Look
Analyzing Timed Systems Using Tree Automata
Quick Look
Language Preservation Problems in Parametric Timed Automata
Quick Look
Timed Automata Robustness Analysis via Model Checking
Quick Look
Model Checking One-clock Priced Timed Automata
Quick Look
Analysis of Timed and Long-Run Objectives for Markov Automata
Quick Look
Model Checking of Continuous-Time Markov Chains Against Timed Automata Specifications
Quick Look
Model Checking Probabilistic Timed Automata with One or Two Clocks
Quick Look
Verification for Timed Automata extended with Unbounded Discrete Data Structures
Quick Look
Dense Integer-Complete Synthesis for Bounded Parametric Timed Automata
Quick Look
Probabilistic Timed Automata with One Clock and Initialised Clock-Dependent Probabilities
Quick Look
Off-line test selection with test purposes for non-deterministic timed automata
Load more items
View Record
Prev
Explore related channels
Next
