Design of a low-resource 2D graphics engine for FPGAs - Tolmie, Donald Francois (Department of Electrical Engineering, 2019)
This study focused on the design and implementation of a low-resource graphics engine, MicroGE, which can be implemented on an FPGA. MicroGE uses a minimal amount of FPGA resources when compared to other graphics engines. After researching existing graphics engines, it was discovered that most make use of a memory space to store frame buffer data. Because of the restrictions that were imposed on the design of MicroGE, it could not incorporate a large enough memory space to store a frame buffer. It was specified that MicroGE should be able to fit on low-resource FPGAs, without any external memory components. Also, MicroGE should be able to fit on modern, high-resource, FPGAs without using a significant amount of those FPGAs’ resources. These goals were achieved by designing MicroGE according to an architecture which differs from the ones of existing graphics engines. MicroGE only renders parts of the video frame, which can be stored in a small memory space, before those parts are transmitted to an HDMI or DVI monitor. After the design was completed, MicroGE, along with other components, was implemented in a VHDL design. Hardware was developed, which contained a Spartan-6 LX25 FPGA, to verify this VHDL. Other verification methods, including the use of VHDL test benches, were also used to verify the VHDL design. A software library, MGAPI, was developed on an Arduino Due microcontroller board. This software library allowed the Arduino Due to display graphics on an HDMI monitor via MicroGE. The Arduino Due was able to update the display of 1000 graphics primitives within 111 ms. The internal FPGA RAM resource usage of MicroGE, 792 kb, was found to be significantly lower than the amount of memory required for a frame buffer. Even though these results were satisfactory, there are still many improvements that can be made to MicroGE. These improvements include increasing the number of rendering capabilities, optimisation of power usage, and increasing the control and video output interfaces.