APA (7th ed.) Citation
(2026). Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components. IET Power Electronics.
Chicago Style (17th ed.) Citation
"Selective Harmonic Elimination Pulse Width Modulation Based Hybrid Multilevel Inverter Topology with Reduced Components." IET Power Electronics 2026.
MLA (9th ed.) Citation
"Selective Harmonic Elimination Pulse Width Modulation Based Hybrid Multilevel Inverter Topology with Reduced Components." IET Power Electronics, 2026.
Warning: These citations may not always be 100% accurate.