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    <title>Results for "Field Programmable Gate Array"</title>
    <description>Showing 1 - 21 results of 21</description>
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      <title>Model predictive control with space-vector modulation for a grid-connected converter with an LCL-Filter</title>
      <pubDate>Wed, 10 Jun 2026 12:47:13 +0000</pubDate>
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      <author>Sadie, Adriaan</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2020</dc:date>
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      <title>Implementation of a protocol and channel coding strategy for use in ground-satellite applications</title>
      <pubDate>Wed, 10 Jun 2026 12:46:57 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F20346</link>
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      <author>Wiid, Riaan</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Wiid, Riaan</dc:creator>
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      <title>A reconfigurable array processor</title>
      <pubDate>Wed, 10 Jun 2026 12:46:57 +0000</pubDate>
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      <author>Bakkes, P. J.</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Bakkes, P. J.</dc:creator>
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      <title>Reduction of the antenna coupling in a bi-static, FM-CW radar system</title>
      <pubDate>Wed, 10 Jun 2026 12:46:51 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F18029</link>
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      <author>Malan, Frederich T</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2011</dc:date>
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      <title>Radiation tolerant implementation of a soft-core processor for space applications</title>
      <pubDate>Wed, 10 Jun 2026 12:46:46 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F1857</link>
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      <author>Van der Horst, Johannes Gerhardus</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2008</dc:date>
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      <title>Energy-efficient processing in radio astronomy: comparative analysis of computing platforms and their implementation</title>
      <pubDate>Wed, 10 Jun 2026 12:45:37 +0000</pubDate>
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      <author>Schuster, Nikola</author>
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      <dc:date>2025</dc:date>
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      <title>Total ionizing dose mitigation by means of reconfigurable FPGA computing</title>
      <pubDate>Wed, 10 Jun 2026 12:45:36 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F1108</link>
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      <author>Smith, Farouk</author>
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      <dc:date>2008</dc:date>
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      <title>An FPGA-based moving target indicator</title>
      <pubDate>Wed, 10 Jun 2026 12:45:32 +0000</pubDate>
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      <author>Knoetzen, Ian</author>
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      <dc:date>2012</dc:date>
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      <title>Dynamic reconfigurable platform for swarm robotics</title>
      <pubDate>Wed, 10 Jun 2026 12:45:22 +0000</pubDate>
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      <author>Heath, Gerhardus</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2011</dc:date>
      <dc:creator>Heath, Gerhardus</dc:creator>
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      <title>Development of an integrated avionics hardware system for unmanned aerial vehicle research purposes</title>
      <pubDate>Wed, 10 Jun 2026 12:44:48 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F6485</link>
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      <author>Van Wyk, Robin</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2011</dc:date>
      <dc:creator>Van Wyk, Robin</dc:creator>
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      <title>A mass memory system for satellites using field programmable gate arrays and synchronous DRAM</title>
      <pubDate>Wed, 10 Jun 2026 12:44:41 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F50558</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F50558</guid>
      <author>Vosloo, Jacobus Jurie</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Vosloo, Jacobus Jurie</dc:creator>
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      <title>FPGA implementation of a network coding capable switch</title>
      <pubDate>Wed, 10 Jun 2026 12:44:39 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F108156</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F108156</guid>
      <author>De Villiers, Daniel Bernard Beaumont</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2020</dc:date>
      <dc:creator>De Villiers, Daniel Bernard Beaumont</dc:creator>
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      <title>An FPGA-based adaptive forward error correction protocol for cubeSats</title>
      <pubDate>Wed, 10 Jun 2026 12:43:03 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F101102</link>
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      <author>Mkhaliphi, Sandile</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2017</dc:date>
      <dc:creator>Mkhaliphi, Sandile</dc:creator>
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      <title>The implementation of a microprocessor in a FPGA</title>
      <pubDate>Wed, 10 Jun 2026 12:43:03 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F56008</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F56008</guid>
      <author>Jordaan, C. H.(Cornelis Hendrik)</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Jordaan, C. H.(Cornelis Hendrik)</dc:creator>
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      <title>Accelerating the method of moments implementation on FPGA hardware</title>
      <pubDate>Wed, 10 Jun 2026 12:41:54 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F123696</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F123696</guid>
      <author>Mnisi, Caleb</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2021</dc:date>
      <dc:creator>Mnisi, Caleb</dc:creator>
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      <title>Development of superconducting field-programmable gate array and supporting EDA software </title>
      <pubDate>Wed, 10 Jun 2026 12:41:40 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F131821</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F131821</guid>
      <author>Maree, Calvin Christopher</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2025</dc:date>
      <dc:creator>Maree, Calvin Christopher</dc:creator>
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      <title>The design and implementation of a video compression development board</title>
      <pubDate>Wed, 10 Jun 2026 12:41:28 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F6547</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F6547</guid>
      <author>Alalait, Suliman</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2011</dc:date>
      <dc:creator>Alalait, Suliman</dc:creator>
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      <title>The design and testing of a superconducting programmable gate array</title>
      <pubDate>Wed, 10 Jun 2026 12:41:14 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F1644</link>
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      <author>Van Heerden, Hein</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2006</dc:date>
      <dc:creator>Van Heerden, Hein</dc:creator>
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      <title>FPGA accelerated radio galaxy classification with a Fourier convolutional neural network </title>
      <pubDate>Wed, 10 Jun 2026 12:41:07 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F132197</link>
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      <author>Edwards, Barend Jacobus</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2025</dc:date>
      <dc:creator>Edwards, Barend Jacobus</dc:creator>
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      <title>Charge pumps and floating gate devices for switching applications</title>
      <pubDate>Wed, 10 Jun 2026 12:38:55 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F29882</link>
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      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
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      <title>Identifying worst case test vectors for FPGA exposed to total ionization dose using design for testability techniques</title>
      <pubDate>Wed, 10 Jun 2026 12:35:48 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:fount.aucegypt.edu:etds-2348</link>
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      <author>Abdelwahab, Mohamed Sami</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2018</dc:date>
      <dc:creator>Abdelwahab, Mohamed Sami</dc:creator>
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