<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" href="/themes/root/assets/xsl/rss.xsl"?>
<rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/">
  <channel>
    <title>Results for "Integrated circuits"</title>
    <description>Showing 1 - 28 results of 28</description>
    <generator>Laminas_Feed_Writer 2 (https://getlaminas.org)</generator>
    <link>https://search.frelip.org/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;lookfor=%22Integrated+circuits%22&amp;type=Subject&amp;lng=en</link>
    <opensearch:totalResults>28</opensearch:totalResults>
    <opensearch:startIndex>0</opensearch:startIndex>
    <opensearch:itemsPerPage>50</opensearch:itemsPerPage>
    <opensearch:Query role="request" searchTerms="%22Integrated%20circuits%22" startIndex="0"/>
    <atom:link rel="first" type="application/rss+xml" title="Go to First Page" href="https://search.frelip.org/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;view=rss&amp;lookfor=%22Integrated+circuits%22&amp;type=Subject&amp;lng=en"/>
    <atom:link rel="last" type="application/rss+xml" title="Go to Last Page" href="https://search.frelip.org/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;view=rss&amp;lookfor=%22Integrated+circuits%22&amp;type=Subject&amp;lng=en&amp;page=1"/>
    <atom:link rel="self" type="application/rss+xml" href="https://search.frelip.org/Search/Results?sort=last_indexed+desc&amp;limit=50&amp;view=rss&amp;lookfor=%22Integrated+circuits%22&amp;type=Subject&amp;lng=en"/>
    <item>
      <title>Design of a fully protected integrated circuit power transistor</title>
      <pubDate>Wed, 10 Jun 2026 12:46:37 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F65095</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F65095</guid>
      <author>Vawda, Ismail Ahmed</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Vawda, Ismail Ahmed</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Harmonic frequency multipliers</title>
      <pubDate>Wed, 10 Jun 2026 12:46:22 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F65734</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F65734</guid>
      <author>Maritz, F. A.(Frans Albertus)</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Maritz, F. A.(Frans Albertus)</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>The Coordination and control of smart inverters  utilizing Volt-VAr and Volt-Watt in low voltage  networks, and opportunities for South Africa</title>
      <pubDate>Wed, 10 Jun 2026 12:46:21 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F124574</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F124574</guid>
      <author>Xavier, Ria</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2022</dc:date>
      <dc:creator>Xavier, Ria</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Solving three-layer planar microwave structures with the method-of-lines</title>
      <pubDate>Wed, 10 Jun 2026 12:44:53 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F51031</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F51031</guid>
      <author>Van Brakel, Wessel J. A</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Van Brakel, Wessel J. A</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>The design of a reliable minimum area VLSI circuit</title>
      <pubDate>Wed, 10 Jun 2026 12:44:52 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F67107</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F67107</guid>
      <author>Nel, Louis Fourie</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Nel, Louis Fourie</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Synthesis, placement and routing tools for RSFQ digital integrated circuit design</title>
      <pubDate>Wed, 10 Jun 2026 12:44:41 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F127025</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F127025</guid>
      <author>Verburg, Edrich</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2023</dc:date>
      <dc:creator>Verburg, Edrich</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Gate-level superconductor integrated circuit fabrication process modelling for improved layout extraction</title>
      <pubDate>Wed, 10 Jun 2026 12:44:37 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F109818</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F109818</guid>
      <author>Herbst, Heinrich</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2021</dc:date>
      <dc:creator>Herbst, Heinrich</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Inductance in superconductor integrated circuits</title>
      <pubDate>Wed, 10 Jun 2026 12:44:34 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F127324</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F127324</guid>
      <author>Fourie, Coenrad</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2023</dc:date>
      <dc:creator>Fourie, Coenrad</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Analise en ontwerp van 'n direkte omsetter met hekafskakeltiristors</title>
      <pubDate>Wed, 10 Jun 2026 12:44:34 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F65042</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F65042</guid>
      <author>Mattheus, Oredus</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Mattheus, Oredus</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Design and evaluation of a formula cache for SMT-based bounded model checking tools</title>
      <pubDate>Wed, 10 Jun 2026 12:43:43 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F103809</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F103809</guid>
      <author>Breytenbach, Jean Anré</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2018</dc:date>
      <dc:creator>Breytenbach, Jean Anré</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>n Ondersoek na ontwerp en bou van 'n stroombaanskyfie en geintegreerde stroombaan toetser</title>
      <pubDate>Wed, 10 Jun 2026 12:43:31 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F64989</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F64989</guid>
      <author>Burger, Pierre Jacobus</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Burger, Pierre Jacobus</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Adaptive cross approximation for electromagnetic analysis of superconducting circuits</title>
      <pubDate>Wed, 10 Jun 2026 12:42:46 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F106196</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F106196</guid>
      <author>Nel, Abraham Pieter Ben</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2019</dc:date>
      <dc:creator>Nel, Abraham Pieter Ben</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Fast multi-core CEM solvers and flux trapping analysis for superconducting structures</title>
      <pubDate>Wed, 10 Jun 2026 12:42:33 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F103747</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F103747</guid>
      <author>Jackman, Kyle</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2018</dc:date>
      <dc:creator>Jackman, Kyle</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Facilitating the identification of solid state phases and concentrations in micro-volumes</title>
      <pubDate>Wed, 10 Jun 2026 12:42:26 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F54745</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F54745</guid>
      <author>Churms, Cecil Lindsay</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Churms, Cecil Lindsay</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Automated synthesis, placement and routing of large-scale RSFQ integrated circuits</title>
      <pubDate>Wed, 10 Jun 2026 12:41:29 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F109942</link>
      <guid>https://search.frelip.org/Record/oai:scholar.sun.ac.za:10019.1%2F109942</guid>
      <author>De Villiers, Jude</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2021</dc:date>
      <dc:creator>De Villiers, Jude</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>SiGe based multiple-phase VCO operating for mm-wave frequencies</title>
      <pubDate>Wed, 10 Jun 2026 12:40:44 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F31628</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F31628</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Phase noise reduction of a 0.35 μm BiCMOS SiGe 5 GHz Voltage Controlled Oscillator</title>
      <pubDate>Wed, 10 Jun 2026 12:40:28 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F29413</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F29413</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>A Temperature stabilised CMOS VCO based on amplitude control</title>
      <pubDate>Wed, 10 Jun 2026 12:40:09 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F33447</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F33447</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2014</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>A SiGe BiCMOS LNA for mm-wave applications</title>
      <pubDate>Wed, 10 Jun 2026 12:40:07 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F26501</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F26501</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology</title>
      <pubDate>Wed, 10 Jun 2026 12:39:57 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F48947</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F48947</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2015</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Charge pumps and floating gate devices for switching applications</title>
      <pubDate>Wed, 10 Jun 2026 12:38:55 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F29882</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F29882</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Trellis decoding of Reed Solomon and related linear block codes</title>
      <pubDate>Wed, 10 Jun 2026 12:38:50 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F30447</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F30447</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Modelling of transceiver propagation characteristics through an analogue SiGe BiCMOS integrated circuit</title>
      <pubDate>Wed, 10 Jun 2026 12:37:42 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F32461</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F32461</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequencies</title>
      <pubDate>Wed, 10 Jun 2026 12:37:38 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F40986</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F40986</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2014</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequencies</title>
      <pubDate>Wed, 10 Jun 2026 12:37:31 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F43266</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F43266</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2015</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method</title>
      <pubDate>Wed, 10 Jun 2026 12:37:08 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F23858</link>
      <guid>https://search.frelip.org/Record/oai:repository.up.ac.za:2263%2F23858</guid>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>New mathematical formulation for designing a fully differential self-biased folded cascode amplifier</title>
      <pubDate>Wed, 10 Jun 2026 12:35:47 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:fount.aucegypt.edu:etds-2232</link>
      <guid>https://search.frelip.org/Record/oai:fount.aucegypt.edu:etds-2232</guid>
      <author>Abdelsalam, Mohamed Adel</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2012</dc:date>
      <dc:creator>Abdelsalam, Mohamed Adel</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
    <item>
      <title>Macro-model of through silicon vias (tsvs) arrays</title>
      <pubDate>Wed, 10 Jun 2026 12:35:47 +0000</pubDate>
      <link>https://search.frelip.org/Record/oai:fount.aucegypt.edu:etds-2241</link>
      <guid>https://search.frelip.org/Record/oai:fount.aucegypt.edu:etds-2241</guid>
      <author>Ahmed, Karim</author>
      <dc:format>Thesis</dc:format>
      <dc:date>2013</dc:date>
      <dc:creator>Ahmed, Karim</dc:creator>
      <slash:comments>0</slash:comments>
    </item>
  </channel>
</rss>
