Integrated Circuits Parasitic Capacitance Extraction Using Machine Learning and its Application to Layout Optimization by Saleh, Mohamed Saleh Abouelyazid

Subjects: “…VLSI and Circuits, Embedded and Hardware Systems…”
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Fault Modeling and Test Vector Generation for ASIC Devices Exposed to Space Single Event Environment by Mohamed, Ahmed

Subjects: “…VLSI and Circuits, Embedded and Hardware Systems…”
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Physical Effects on the Worst-Case Delay Analysis and Signal Integrity of Buses and Spirals by Mahany, Mahmoud

Subjects: “…VLSI and Circuits, Embedded and Hardware Systems…”
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Fast and Accurate Automatic Design of Spiral Inductors from High-Level Specification by Ismail, Heba

Subjects: “…VLSI and Circuits, Embedded and Hardware Systems…”
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Single Event Transient Sensitivity Measurement and Worst-Case Test Vector Exploration for ASIC Devices Exposed to Space Single Event Environment by Wael, Mohamed

Subjects: “…VLSI and Circuits, Embedded and Hardware Systems…”
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Machine Learning Applications to Static Timing Analysis by Raslan, Waseem Mohamed

Subjects: “…VLSI and Circuits, Embedded and Hardware Systems…”
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