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Search Results - (( Field-programme have array ) OR ( field-programmable rate array ))
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An FPGA-based adaptive forward error correction protocol for cubeSats
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Total ionizing dose mitigation by means of reconfigurable FPGA computing
Published 2008Get full text
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Development of superconducting field-programmable gate array and supporting EDA software
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FPGA implementation of a network coding capable switch
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A mass memory system for satellites using field programmable gate arrays and synchronous DRAM
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Accelerating the method of moments implementation on FPGA hardware
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Energy-efficient processing in radio astronomy: comparative analysis of computing platforms and their implementation
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The design and implementation of a video compression development board
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FPGA accelerated radio galaxy classification with a Fourier convolutional neural network
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Dynamic reconfigurable platform for swarm robotics
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Implementation of a protocol and channel coding strategy for use in ground-satellite applications
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High frame rate marker detection for single camera-based localisation
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An electronically focused multiple beam side scan sonar
Published 2017“…High resolution side scan sonar systems have many operational parameters that may only be extended with the aid of phased arrays, the resolution and the imaging rate being the most important. …”
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Evaluating FFT Implementations Developed for use on FPGA Hardware
Published 2024“…Field Programmable Gate Arrays (FPGAs) are a type of hardware commonly used to perform the various computations required to process incoming radio signals, including the FFT. …”
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Development of a multilevel converter topology for transformer-less connection of renewable energy systems
Published 2023“…The proposed converter topology, known as the "tapped inductor quasi-Z-source nested neutral-point-clamped (NNPC) converter," has been analyzed, and designed, and a prototype of the topology developed for experimental verification. A field-programmable gate array (FPGA)-based modulation technique and voltage balancing control technique for maintaining the clamping capacitor voltages was developed. …”
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The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation
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SdrLift: A Domain-Specific Intermediate Hardware Synthesis Framework for Prototyping Software-Defined Radios
Published 2021“…Modern design of Software-Defined Radio (SDR) applications is based on Field Programmable Gate Arrays (FPGA) due to their ability to be configured into solution architectures that are well suited to domain-specific problems while achieving the best trade-off between performance, power, area, and flexibility. …”
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Challenges and coping strategies of child and youth care workers in the South African context
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Story, in progress: considering new methods for the analysis of ongoing television series
Published 2019“…And despite significant contributions to this area of inquiry, it still remains an aspect of television studies that receives less critical attention than the analysis of a programme’s content. This thesis hopes to make a contribution to the field by developing flexible and comprehensive analytical tools that will allow scholars to analyse television series that are vast and, often, still in the process of ‘construction’. …”
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A hardware implementation of a Viterbi decoder for a (3,2/3) TCM code
Published 2016“…It was the specific intention of the thesis to design a system that could be implemented on standard Field Programmable Gate Arrays (FPGA) yet still be able to cope with high bit rates. …”
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