Realization of Pure Boron/Si Diodes Through a Two-Step Low-Temperature Growth in a Home-Built LP CVD System

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Continuum Modeling of High-Field Transport in Semiconductors

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Erratum to “Comprehensive Experimental and Simulation Study of Six 1.2kV SiC MOSFET Layout Topologies”

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2xVDD-Tolerant ESD Clamp With Dual Detection and Ultra-Low Leakage

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Characterization of FDSOI Technology for Energy-Efficient Cryo-CMOS Circuits

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Overcoming the Mobility–Stability Trade-Off Using an Ultra-Thin Oxide Capping Layer via N2O Plasma Treatment

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Impact of Power Loss in the Substrate on the Efficiency of RF GaN-on-Si HEMTs

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A Connectivity-Aware Via-Programmable DNN Processor Using a Single Photomask

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A High Gain Operational Amplifier With Dual-Tail Source Architecture for Fast Slewing

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Spur Analysis and Linearity Enhancement in Fractional-N Phase Locked Loops Through Parallel Sigma–Delta Modulators With Time Offsets

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Thermal-Aware NoC for AI Computing: Tools, Algorithms, and Applications

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Analog Convolution Circuit System Implemented With Capacitor Array Superposition

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A SAR-Assisted Continuous-Time M-0 MASH Delta-Sigma Modulator With Digital-Domain Noise Leakage Shaping

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Non-Iterative Square-Wave Modeling of Multistage CMOS Dickson Rectifiers for RF Energy Harvesting

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A Miniaturized Ingestible Capsule With Integrated ASIC for Energy-Efficient Sensing in the Gastrointestinal Tract

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Equalization and Coding Techniques for Edge Modulation Signaling

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On Feedforward Cancellation of Third-Order Nonlinear Distortion in Wideband Receivers

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A PPWM-Based CMOS Wireless Power Charger With Active Bias-Clamp Cascode Biasing and Load-Adaptive Rectifier Sizing

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Gain Modulation Using Shunting Inhibition in a Biased Subthreshold CMOS Dendrite

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