Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory

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Sb-Doped Substrates for Low-Noise Silicon Photomultipliers

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Miller-Current Suppressing Technology for False Turn-On Protection of Commercial p-GaN HEMTs

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Memory Window Enhancement With Germanium-Incorporated Charge Trap Layer in Flash Memory Device

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Research on 4H-SiC Photoconductive Semiconductor Switch Employing Composite Anti-Reflection Coating

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Evaluation of Interface Traps Within Drift Region in LDMOS Using a Multi-Pulse Test Method

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Memcapacitor-Based Insect Feeding Behaviour Classification With Reservoir Computing

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Power Spectral Density of Thermal Noise at High Frequencies in Thermal Conductance for Semiconductor Devices

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Measurement and Analysis of Multistate Ferroelectric Transistors in 28 nm CMOS Process

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Realization of Pure Boron/Si Diodes Through a Two-Step Low-Temperature Growth in a Home-Built LP CVD System

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Continuum Modeling of High-Field Transport in Semiconductors

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Erratum to “Comprehensive Experimental and Simulation Study of Six 1.2kV SiC MOSFET Layout Topologies”

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2xVDD-Tolerant ESD Clamp With Dual Detection and Ultra-Low Leakage

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Characterization of FDSOI Technology for Energy-Efficient Cryo-CMOS Circuits

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Overcoming the Mobility–Stability Trade-Off Using an Ultra-Thin Oxide Capping Layer via N2O Plasma Treatment

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Impact of Power Loss in the Substrate on the Efficiency of RF GaN-on-Si HEMTs

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A Connectivity-Aware Via-Programmable DNN Processor Using a Single Photomask

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A High Gain Operational Amplifier With Dual-Tail Source Architecture for Fast Slewing

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Spur Analysis and Linearity Enhancement in Fractional-N Phase Locked Loops Through Parallel Sigma–Delta Modulators With Time Offsets

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