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This thesis addresses the challenge of transporting supervisory video alongside time-critical control traffic in industrial Networked Control Systems (NCS) without violating stringent real-time constraints. A simple yet scalable network architecture is developed and evaluated for a plant-level deplo...
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| Format: | Thesis |
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AUC Knowledge Fountain
2026
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| Summary: | This thesis addresses the challenge of transporting supervisory video alongside time-critical control traffic in industrial Networked Control Systems (NCS) without violating stringent real-time constraints. A simple yet scalable network architecture is developed and evaluated for a plant-level deployment comprising three interconnected workcells with sensors, controllers, actuators, and cameras. The design explicitly accommodates bandwidth-intensive video streams while preserving the responsiveness of watchdog/control traffic. Analytical delay modeling decomposes end-to-end latency into transmission, propagation, processing, and queuing components, and Riverbed-based simulations are used to validate the model under realistic mixed-traffic conditions. A traffic-engineering strategy - phase-shifting supervisory camera transmissions - effectively desynchronizes frame bursts across cells. This intervention achieves a pronounced reduction in congestion-induced queuing, decreasing end-to-end delays for watchdog packets by more than 95%, thereby restoring timely delivery under load.
Building on this baseline, the thesis presents an enhanced fault-tolerant architecture that sustains high-quality video supervision while maintaining real-time performance. Two advances have been assessed. First, supervisory video quality is increased to the standard 50 frames per second (fps) to improve monitoring fidelity. Second, Field Programmable Gate Array (FPGA) resources embedded within the core network switch are leveraged to perform local controller fault recovery. By isolating control processing from high-bitrate video handling and keeping recovery within the switching fabric, the FPGA-enhanced design preserves responsiveness during controller failures. Simulation results confirm that maximum delays in faulty scenarios remain well within real-time requirements, and that the FPGA-based approach yields a 7.58% latency improvement relative to previously studied designs.
Collectively, these results demonstrate that targeted traffic management and in-network fault-recovery mechanisms enable scalable integration of supervisory video in NCS without compromising control-loop deadlines. The contributions provide a practical path for modernizing industrial architectures to support richer supervision while upholding the reliability and determinism required in production environments. |
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