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Evaluating FFT Implementations Developed for use on FPGA Hardware
The Fast Fourier Transform (FFT) is an important algorithm within the field of radio astronomy, where it is used as a key processing component in the digital signal processing (DSP) backends of radio spectrometers. Field Programmable Gate Arrays (FPGAs) are a type of hardware commonly used to perfor...
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| Format: | Thesis |
| Language: | English |
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Department of Electrical Engineering
2024
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| _version_ | 1867613259424595969 |
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| access_status_str | Open Access |
| author | Brown, Morag |
| author2 | Schonken, Willem |
| author_browse | Brown, Morag Schonken, Willem |
| author_facet | Schonken, Willem Brown, Morag |
| author_sort | Brown, Morag |
| collection | Thesis |
| description | The Fast Fourier Transform (FFT) is an important algorithm within the field of radio astronomy, where it is used as a key processing component in the digital signal processing (DSP) backends of radio spectrometers. Field Programmable Gate Arrays (FPGAs) are a type of hardware commonly used to perform the various computations required to process incoming radio signals, including the FFT. As the FFT is a pivotal part of the DSP chain, the performance of the FFT implementation is a primary consideration when designing radio instruments. Here, performance measurements include numerical accuracy, logic resource utilisation and maximum clock rates at which the implementation can be operated. This research project investigates, tests and compares three different FFT cores, namely the CASPER wideband, ASTRON wideband, and Xilinx SSR FFTs, implemented for use on FPGA hardware. The hardware on which these FFTs are tested are the Square Kilometer Array Reconfigurable Application Board (SKARAB) and the Xilinx Alveo AU50 Accelerator Card. Testing metrics have been selected specifically for radio astronomy applications and include Spurious Free Dynamic Range (SFDR), signal-to-noise ratio (SNR) preservation, quantisation noise, resource utilisation and achievable clock rates. A double precision floating point software FFT, the Fastest Fourier Transform in the West (FFTW), has been selected as the benchmark against which the numerical accuracy of the FFT cores under test are compared. Results of this research project indicate that, when tested under the same conditions for default configuration options, the Xilinx core performs with the greatest degree of numerical accuracy and the ASTRON core with the least. While the CASPER core in its default state performs to a slightly lesser degree of accuracy than its Xilinx equivalent, this core can be configured in such a way that its performance is greatly improved - resulting in highly accurate results that surpass the performance of all other cores. The ASTRON and Xilinx cores do not provide the same configuration options that would allow for the same level of improvement. From a hardware resource utilisation perspective, ASTRON is the least resource efficient core and the CASPER core the most efficient. Both CASPER and Xilinx cores are capable of achieving clock rates between 450MHz-600MHz on Xilinx UltraScale+ hardware, while the ASTRON core failed to achieve a clock rate of 200MHz for the same test configuration. |
| format | Thesis |
| id | oai:open.uct.ac.za:11427/39297 |
| institution | University of Cape Town (South Africa) |
| language | eng |
| last_indexed | 2026-06-10T12:33:17.409Z |
| license_str | Not specified — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from UCTD — University of Cape Town Open Access Repository |
| publishDate | 2024 |
| publishDateRange | 2024 |
| publishDateSort | 2024 |
| publisher | Department of Electrical Engineering |
| publisherStr | Department of Electrical Engineering |
| record_format | dspace |
| source_str | UCTD — University of Cape Town Open Access Repository |
| spelling | oai:open.uct.ac.za:11427/39297 Evaluating FFT Implementations Developed for use on FPGA Hardware Brown, Morag Schonken, Willem Engineering The Fast Fourier Transform (FFT) is an important algorithm within the field of radio astronomy, where it is used as a key processing component in the digital signal processing (DSP) backends of radio spectrometers. Field Programmable Gate Arrays (FPGAs) are a type of hardware commonly used to perform the various computations required to process incoming radio signals, including the FFT. As the FFT is a pivotal part of the DSP chain, the performance of the FFT implementation is a primary consideration when designing radio instruments. Here, performance measurements include numerical accuracy, logic resource utilisation and maximum clock rates at which the implementation can be operated. This research project investigates, tests and compares three different FFT cores, namely the CASPER wideband, ASTRON wideband, and Xilinx SSR FFTs, implemented for use on FPGA hardware. The hardware on which these FFTs are tested are the Square Kilometer Array Reconfigurable Application Board (SKARAB) and the Xilinx Alveo AU50 Accelerator Card. Testing metrics have been selected specifically for radio astronomy applications and include Spurious Free Dynamic Range (SFDR), signal-to-noise ratio (SNR) preservation, quantisation noise, resource utilisation and achievable clock rates. A double precision floating point software FFT, the Fastest Fourier Transform in the West (FFTW), has been selected as the benchmark against which the numerical accuracy of the FFT cores under test are compared. Results of this research project indicate that, when tested under the same conditions for default configuration options, the Xilinx core performs with the greatest degree of numerical accuracy and the ASTRON core with the least. While the CASPER core in its default state performs to a slightly lesser degree of accuracy than its Xilinx equivalent, this core can be configured in such a way that its performance is greatly improved - resulting in highly accurate results that surpass the performance of all other cores. The ASTRON and Xilinx cores do not provide the same configuration options that would allow for the same level of improvement. From a hardware resource utilisation perspective, ASTRON is the least resource efficient core and the CASPER core the most efficient. Both CASPER and Xilinx cores are capable of achieving clock rates between 450MHz-600MHz on Xilinx UltraScale+ hardware, while the ASTRON core failed to achieve a clock rate of 200MHz for the same test configuration. 2024-04-04T08:14:48Z 2024-04-04T08:14:48Z 2023 2024-04-04T06:22:25Z Thesis / Dissertation Masters MSc http://hdl.handle.net/11427/39297 eng application/pdf Department of Electrical Engineering Faculty of Engineering and the Built Environment |
| spellingShingle | Engineering Brown, Morag Evaluating FFT Implementations Developed for use on FPGA Hardware |
| thesis_degree_str | Master's |
| title | Evaluating FFT Implementations Developed for use on FPGA Hardware |
| title_full | Evaluating FFT Implementations Developed for use on FPGA Hardware |
| title_fullStr | Evaluating FFT Implementations Developed for use on FPGA Hardware |
| title_full_unstemmed | Evaluating FFT Implementations Developed for use on FPGA Hardware |
| title_short | Evaluating FFT Implementations Developed for use on FPGA Hardware |
| title_sort | evaluating fft implementations developed for use on fpga hardware |
| topic | Engineering |
| url | http://hdl.handle.net/11427/39297 |
| work_keys_str_mv | AT brownmorag evaluatingfftimplementationsdevelopedforuseonfpgahardware |