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An integrated CMOS optical receiver with clock and data recovery Circuit

Dissertation (MEng (Micro-Electronics))--University of Pretoria, 2007.

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Other Authors: Du Plessis, Monuko
Format: Thesis
Published: University of Pretoria 2013
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access_status_str Open Access
author2 Du Plessis, Monuko
author_browse Du Plessis, Monuko
author_facet Du Plessis, Monuko
collection Thesis
dc_rights_str_mv © 2005, University of Pretoria. All rights reserved. The copyright in this work vests in the University of Pretoria. No part of this work may be reproduced or transmitted in any form or by any means, without the prior written permission of the University of Pretoria.
description Dissertation (MEng (Micro-Electronics))--University of Pretoria, 2007.
format Thesis
id oai:repository.up.ac.za:2263/24807
institution University of Pretoria (South Africa)
last_indexed 2026-06-10T12:36:32.122Z
license_str Other — see source repository
provenance_str_mv Harvested via OAI-PMH from UPSpace — University of Pretoria Institutional Repository
publishDate 2013
publishDateRange 2013
publishDateSort 2013
publisher University of Pretoria
publisherStr University of Pretoria
record_format dspace
source_str UPSpace — University of Pretoria Institutional Repository
spelling oai:repository.up.ac.za:2263/24807 An integrated CMOS optical receiver with clock and data recovery Circuit Du Plessis, Monuko yjchen@eng.up.ac.za Chen, Yi-Ju Phase-locked loop Oscillator Clock and data recovery circuit Inductive peaking Front-end Photodetector Optical receiver Frequency-locked loop UCTD Dissertation (MEng (Micro-Electronics))--University of Pretoria, 2007. Traditional implementations of optical receivers are designed to operate with external photodetectors or require integration in a hybrid technology. By integrating a CMOS photodetector monolithically with an optical receiver, it can lead to the advantage of speed performance and cost. This dissertation describes the implementation of a photodetector in CMOS technology and the design of an optical receiver front-end and a clock and data recovery system. The CMOS detector converts the light input into an electrical signal, which is then amplified by the receiver front-end. The recovery system subsequently processes the amplified signal to extract the clock signal and retime the data. An inductive peaking methodology has been used extensively in the front-end. It allows the accomplishment of a necessary gain to compensate for an underperformed responsivity from the photodetector. The recovery circuits based on a nonlinear circuit technique were designed to detect the timing information contained in the data input. The clock and data recovery system consists of two units viz. a frequency-locked loop and a phase-locked loop. The frequency-locked loop adjusts the oscillator’s frequency to the vicinity of data rate before phase locking takes place. The phase-locked loop detects the relative locations between the data transition and the clock edge. It then synchronises the input data to the clock signal generated by the oscillator. A system level simulation was performed and it was found to function correctly and to comply with the gigabit fibre channel specification. Electrical, Electronic and Computer Engineering unrestricted 2013-09-06T18:28:18Z 2006-01-24 2013-09-06T18:28:18Z 2005-08-09 2007-01-24 2006-01-24 Dissertation Chen, Y 2005, An integrated CMOS optical receiver with clock and data recovery Circuit, MEng dissertation, University of Pretoria, Pretoria, viewed yymmdd < http://hdl.handle.net/2263/24807 > http://hdl.handle.net/2263/24807 http://upetd.up.ac.za/thesis/available/etd-01242006-102128/ © 2005, University of Pretoria. All rights reserved. The copyright in this work vests in the University of Pretoria. No part of this work may be reproduced or transmitted in any form or by any means, without the prior written permission of the University of Pretoria. application/pdf University of Pretoria
spellingShingle Phase-locked loop
Oscillator
Clock and data recovery circuit
Inductive peaking
Front-end
Photodetector
Optical receiver
Frequency-locked loop
UCTD
An integrated CMOS optical receiver with clock and data recovery Circuit
title An integrated CMOS optical receiver with clock and data recovery Circuit
title_full An integrated CMOS optical receiver with clock and data recovery Circuit
title_fullStr An integrated CMOS optical receiver with clock and data recovery Circuit
title_full_unstemmed An integrated CMOS optical receiver with clock and data recovery Circuit
title_short An integrated CMOS optical receiver with clock and data recovery Circuit
title_sort integrated cmos optical receiver with clock and data recovery circuit
topic Phase-locked loop
Oscillator
Clock and data recovery circuit
Inductive peaking
Front-end
Photodetector
Optical receiver
Frequency-locked loop
UCTD
url http://hdl.handle.net/2263/24807
http://upetd.up.ac.za/thesis/available/etd-01242006-102128/