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Dissertation (MEng)--University of Pretoria, 2011.
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| Format: | Thesis |
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University of Pretoria
2013
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| _version_ | 1867613671281131520 |
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| access_status_str | Open Access |
| author2 | Sinha, Saurabh |
| author_browse | Sinha, Saurabh |
| author_facet | Sinha, Saurabh |
| collection | Thesis |
| dc_rights_str_mv | © 2011 University of Pretoria. All rights reserved. The copyright in this work vests in the University of Pretoria. No part of this work may be reproduced or transmitted in any form or by any means, without the prior written permission of the University of Pretoria. |
| description | Dissertation (MEng)--University of Pretoria, 2011. |
| format | Thesis |
| id | oai:repository.up.ac.za:2263/28712 |
| institution | University of Pretoria (South Africa) |
| last_indexed | 2026-06-10T12:39:51.199Z |
| license_str | Other — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from UPSpace — University of Pretoria Institutional Repository |
| publishDate | 2013 |
| publishDateRange | 2013 |
| publishDateSort | 2013 |
| publisher | University of Pretoria |
| publisherStr | University of Pretoria |
| record_format | dspace |
| source_str | UPSpace — University of Pretoria Institutional Repository |
| spelling | oai:repository.up.ac.za:2263/28712 Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links Sinha, Saurabh marius.goosen@up.ac.za Goosen, Marius Eugene Bicmos Ibm 7wl 0.18 μm bicmos Adaptive pre-emphasis Fir pre-emphasis Inter-symbol interference Data dependant jitter High speed serial links Sige Jitter Backplane serial link UCTD Dissertation (MEng)--University of Pretoria, 2011. Jitter requirements have become more stringent with higher speed serial communication links. Reducing jitter, with the main focus on reducing data dependant jitter (DDJ), is presented by employing adaptive finite impulse response (FIR) filter pre-emphasis. The adaptive FIR pre-emphasis is implemented in the IBM 7WL 0.18 µm SiGe BiCMOS process. SiGe heterojunction bipolar transistors (HBTs) provide high bandwidth, low noise devices which could reduce the total system jitter. The trade-offs between utilising metal oxide semiconductor (MOS) current mode logic (CML) and SiGe bipolar CML are also discussed in comparison with a very high fT (IBM 8HP process with fT = 200 GHz) process. A reduction in total system jitter can be achieved by keeping the sub-components of the system jitter constant while optimising the DDJ. High speed CML circuits have been employed to allow data rates in excess of 5 Gb/s to be transmitted whilst still maintaining an internal voltage swing of at least 300 mV. This allows the final FIR filter adaptation scheme to minimise the DDJ within 12.5 % of a unit interval, at a data rate of 5 Gb/s implementing 6 FIR pre-emphasis filter taps, for a worst case copper backplane channel (30" FR-4 channel). The implemented integrated circuit (IC) designed as part of the verification process takes up less than 1 mm2 of silicon real estate. In this dissertation, SPICE simulation results are presented, as well as the novel IC implementation of the proposed FIR filter adaptation technique as part of the hypothesis verification procedure. The implemented transmitter and receiver were tested for functionality, and showed the successful functional behaviour of all the implemented CML gates associated with the first filter tap. However, due to the slow charge and discharge rate of the pulse generation circuit in both the transmitter and receiver, only the main operational state of the transmitter could be experimentally validated. As a result of the adaptation scheme implemented, the contribution in this research lies in that a designer utilising such an IC can optimise the DDJ, reducing the total system jitter, and hence increasing the data fidelity with minimal effort. Electrical, Electronic and Computer Engineering unrestricted 2013-09-07T14:07:29Z 2011-04-15 2013-09-07T14:07:29Z 2011-04-06 2011 2011-02-14 Dissertation Goosen, ME 2011, Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links, MEng dissertation, University of Pretoria, Pretoria, viewed yymmdd < http://hdl.handle.net/2263/28712 > C11/64/ag http://hdl.handle.net/2263/28712 http://upetd.up.ac.za/thesis/available/etd-02142011-171201/ © 2011 University of Pretoria. All rights reserved. The copyright in this work vests in the University of Pretoria. No part of this work may be reproduced or transmitted in any form or by any means, without the prior written permission of the University of Pretoria. application/pdf University of Pretoria |
| spellingShingle | Bicmos Ibm 7wl 0.18 μm bicmos Adaptive pre-emphasis Fir pre-emphasis Inter-symbol interference Data dependant jitter High speed serial links Sige Jitter Backplane serial link UCTD Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links |
| title | Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links |
| title_full | Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links |
| title_fullStr | Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links |
| title_full_unstemmed | Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links |
| title_short | Reducing jitter utilising adaptive pre-emphasis FIR filter for high speed serial links |
| title_sort | reducing jitter utilising adaptive pre emphasis fir filter for high speed serial links |
| topic | Bicmos Ibm 7wl 0.18 μm bicmos Adaptive pre-emphasis Fir pre-emphasis Inter-symbol interference Data dependant jitter High speed serial links Sige Jitter Backplane serial link UCTD |
| url | http://hdl.handle.net/2263/28712 http://upetd.up.ac.za/thesis/available/etd-02142011-171201/ |