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The development and characterisation of a parameterised RSFQ cell library for layout synthesis
Thesis (PhD)--Stellenbosch University, 2021.
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| Format: | Thesis |
| Language: | en_ZA |
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Stellenbosch : Stellenbosch University
2021
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| _version_ | 1867613879159226368 |
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| access_status_str | Open Access |
| author | Schindler, Lieze |
| author2 | Fourie, Coenrad |
| author_browse | Fourie, Coenrad Schindler, Lieze |
| author_facet | Fourie, Coenrad Schindler, Lieze |
| author_sort | Schindler, Lieze |
| collection | Thesis |
| dc_rights_str_mv | Stellenbosch University |
| description | Thesis (PhD)--Stellenbosch University, 2021. |
| format | Thesis |
| id | oai:scholar.sun.ac.za:10019.1/109815 |
| institution | Stellenbosch University (South Africa) |
| language | en_ZA |
| last_indexed | 2026-06-10T12:43:09.148Z |
| license_str | Other — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from SUNScholar — Stellenbosch University Repository |
| publishDate | 2021 |
| publishDateRange | 2021 |
| publishDateSort | 2021 |
| publisher | Stellenbosch : Stellenbosch University |
| publisherStr | Stellenbosch : Stellenbosch University |
| record_format | dspace |
| source_str | SUNScholar — Stellenbosch University Repository |
| spelling | oai:scholar.sun.ac.za:10019.1/109815 The development and characterisation of a parameterised RSFQ cell library for layout synthesis Schindler, Lieze Fourie, Coenrad Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. Layout synthesis UCTD Superconducting generators Rapid Single Flux Quantum Digital electronics Thesis (PhD)--Stellenbosch University, 2021. ENGLISH ABSTRACT: Superconductor electronics have shown great promise for interfacing quantum computers to conventional electronics. Several superconductor logic families show potential, but one particular logic family has shown reliable results: Rapid Single Flux Quantum (RSFQ). RSFQ logic implements single SFQ pulses to represent binary data instead of the traditional voltage levels used by semiconductor electronics. RSFQ is so ubiquitous to superconductor digital systems that it serves as the entry to superconductor digital design. Presently, however, the field of RSFQ logic cell design is very exclusive with a small number of physicists and engineers able to design efficient RSFQ cells. This research aims to provide a formalised RSFQ design methodology with education quality circuit theory. Several RSFQ examples are designed, analysed and improved using phasebased circuit equations. Similar to Kirchhoff’s current and voltage laws, these phase-based equations can be used to accurately determine the current distribution within a cell. The design methodology for multi-state RSFQ cells is also discussed. Multiple simulation methods confirming cell functionality and operating margins are also presented. The education regarding the design, analysis and implementation of RSFQ cells is vastly expanded through this research which can accelerate the field of quantum circuit design. RSFQ cells can be connected using a non-storing inductive loop, Josephson transmission lines (JTLs) or, alternatively, superconductor passive transmission lines (PTLs) to bridge longer distances. Signal transmission of SFQ pulses through PTLs and JTLs are analysed and compared. Impedance matching for PTL interconnects to reduce pulse reflection is also investigated. An example of a portable RSFQ cell library for layout synthesis is developed as part of the IARPA SuperTools program. The challenges of RSFQ cell layouts for the Massachusetts Institute of Technology Lincoln Laboratory (MIT-LL) SFQ5ee fabrication process are discussed. A methodology for establishing a standardised cell layout synthesis is presented. The research contributes to the design and characterisation of track routing architecture for RSFQ on a multilayer fabrication process. Lastly, methods to test fabricated RSFQ circuits are presented. This includes testing the functionality of individual cells, as well as measuring throughput delays. As the SFQ pulses are only a few picoseconds wide, it is not possible to observe these pulses using conventional measuring equipment. The fabricated tests must therefore be designed in such a way that it is possible to extract meaningful measurements. AFRIKAANSE OPSOMMING: Tot op hede het supergeleier-elektronika groot belofte getoon vir die koppeling van kwantumrekenaars, aan konvensionele elektronika. Verskeie supergeleierlogika-families toon potensiaal, maar tot dusver toon die “Rapid Single Flux Quantum” (RSFQ) logika-familie baie betroubare resultate. In kontras met tradisionele halfgeleier-elektronika, wat spanningsvlakke benut, implementeer RSFQ-logika enkele SFQ-pulse om binˆere data voor te stel. RSFQ is so alomteenwoordig vir supergeleier-digitale stelsels dat dit as toegang dien tot digitale supergeleier-ontwerp. Op die oomblik is die veld van RSFQ-logika selontwerp egter baie eksklusief, met slegs ‘n handvol fisici en ingenieurs wat RSFQ-selle doeltreffend kan ontwerp. Hierdie navorsing mik om ‘n geformaliseerde RSFQ-ontwerpmetodologie te bied tesame met onderwys-kwaliteit RSFQ-teorie. Verskeie RSFQ-selle word ontwerp, geanaliseer en verbeter deur middel van fase-gebaseerde stroombaanvergelykings. Hierdie fase-gebaseerde vergelykings kan gebruik word om die stroomverdeling binne ‘n sel, akkuraat te voorspel. Die ontwerpmetodiek vir multi-stadium RSFQ-selle word ook bespreek. Verskeie simulasiemetodes word aangebied om selfunksionaliteit te bevestig. Die navorsing brei uit oor die opleiding rakende die ontwerp, analise en implementering van RSFQ-selle wat verder kan lei tot die versnelling van die kwantumstroomontwerp-veld. RSFQ-selle kan verbind word met ‘n induktiewe lus (wat nie vloed stoor nie), Josephsontransmissielyne (JTL’s) of supergeleier-passiewe transmissielyne (PTL’s) om langer afstande te oorbrug. Die seinoordrag van SFQ pulse deur PTL’s en JTL’s word geanaliseer en vergelyk. Impedansie-aanpassing vir PTL-verbindings om pulsrefleksie te verminder, word ook ondersoek. ‘n Voorbeeld van ‘n draagbare RSFQ-selbiblioteek vir uitlegsintese is ontwikkel as deel van die IARPA SuperTools-program. Die uitdagings vir RSFQ-seluitleg vir die SFQ5ee vervaardigingsproses aan die Massachusetts Institute of Technology Lincoln Laboratory (MIT-LL), word bespreek. ‘n Metodiek vir die stigting van ‘n gestandaardiseerde seluitlegsintese word aangebied. Die navorsing dra by tot die ontwikkeling en karakterisering van ‘n spoorroete-argitektuur vir RSFQ vir ‘n multilaag-vervaardigingsproses. Laastens word metodes aangebied om vervaardigde RSFQ-stroombane te toets. Dit sluit in die toets van die funksionaliteit van individuele selle, asook die meting van deursetvertragings. Aangesien die SFQ-pulse slegs ’n paar piko-sekondes breed is, is dit nie moontlik om hierdie pulse bloot waar te neem deur gebruik te maak van konvensionele meettoerusting nie. Die vervaardigde toetse moet dus so ontwerp word dat dit moontlik is om betekenisvolle metings te onttrek. Doctoral 2021-02-02T08:40:42Z 2021-04-21T14:27:21Z 2021-02-02T08:40:42Z 2021-04-21T14:27:21Z 2021-03 Thesis http://hdl.handle.net/10019.1/109815 en_ZA Stellenbosch University 439 pages : illustrations application/pdf Stellenbosch : Stellenbosch University |
| spellingShingle | Layout synthesis UCTD Superconducting generators Rapid Single Flux Quantum Digital electronics Schindler, Lieze The development and characterisation of a parameterised RSFQ cell library for layout synthesis |
| title | The development and characterisation of a parameterised RSFQ cell library for layout synthesis |
| title_full | The development and characterisation of a parameterised RSFQ cell library for layout synthesis |
| title_fullStr | The development and characterisation of a parameterised RSFQ cell library for layout synthesis |
| title_full_unstemmed | The development and characterisation of a parameterised RSFQ cell library for layout synthesis |
| title_short | The development and characterisation of a parameterised RSFQ cell library for layout synthesis |
| title_sort | development and characterisation of a parameterised rsfq cell library for layout synthesis |
| topic | Layout synthesis UCTD Superconducting generators Rapid Single Flux Quantum Digital electronics |
| url | http://hdl.handle.net/10019.1/109815 |
| work_keys_str_mv | AT schindlerlieze thedevelopmentandcharacterisationofaparameterisedrsfqcelllibraryforlayoutsynthesis AT schindlerlieze developmentandcharacterisationofaparameterisedrsfqcelllibraryforlayoutsynthesis |