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Accelerating the method of moments implementation on FPGA hardware

Thesis (MEng)--Stellenbosch University, 2021.

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Main Author: Mnisi, Caleb
Other Authors: Ludick, Danie
Format: Thesis
Language:en_ZA
Published: Stellenbosch : Stellenbosch University 2021
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access_status_str Open Access
author Mnisi, Caleb
author2 Ludick, Danie
author_browse Ludick, Danie
Mnisi, Caleb
author_facet Ludick, Danie
Mnisi, Caleb
author_sort Mnisi, Caleb
collection Thesis
dc_rights_str_mv Stellenbosch University
description Thesis (MEng)--Stellenbosch University, 2021.
format Thesis
id oai:scholar.sun.ac.za:10019.1/123696
institution Stellenbosch University (South Africa)
language en_ZA
last_indexed 2026-06-10T12:41:54.752Z
license_str Other — see source repository
provenance_str_mv Harvested via OAI-PMH from SUNScholar — Stellenbosch University Repository
publishDate 2021
publishDateRange 2021
publishDateSort 2021
publisher Stellenbosch : Stellenbosch University
publisherStr Stellenbosch : Stellenbosch University
record_format dspace
source_str SUNScholar — Stellenbosch University Repository
spelling oai:scholar.sun.ac.za:10019.1/123696 Accelerating the method of moments implementation on FPGA hardware Mnisi, Caleb Ludick, Danie Barnard, Arno Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. UCTD Transistors Moore's law Technological innovations -- Forecasting Field Programmable Gate Array Programmable logic devices Thesis (MEng)--Stellenbosch University, 2021. ENGLISH ABSTRACT: Advances in transistor technology have reached a point where the physical limitations on chip design means that we are starting to approach a decline in the curve that used to follow Moore’s law. Engineers and Scientists are now turning to Hyper-Scale computing and parallel systems to be able to continue the trend of Moore’s law and offset this decreased cadence. This naturally means that the traditional way of running operations also has to be revised to facilitate implementation on parallel systems. This project aims to develop hardware architecture that optimizes the computation of electromagnetic problems using the Method of Moments (MoM) formulation on field programmable gate array (FPGA) hardware. This can be accomplished by exploiting inherent properties in the formulation that allow for parallel computation of independent sections, and then running these computations in parallel, using dedicated computation units on the FPGA fabric. FPGAs and reconfigurable systems provide a combination of low power consumption and flexibility for applications in computation. We aim to exploit the reconfigurable structure of the FPGA to help facilitate the development of the hardware architecture. The configurable interconnect of the FPGA also allows us to arrange the FPGA resources in a manner that will optimize the specific computation and thus reduce the computation time. AFRIKAANSE OPSOMMING: Vooruitgang in transistor tegnologie het ’n punt bereik waar die fisiese beperkings van rekenaarskyfie ontwerp beteken dat daar ’n afname waargeneem word in die kurwe wat voorheen Moore se wet gevolg het. Ingenieurs en wetenskaplikes het nou begin om hiperskaalse rekenaar en parallelle stelsels aan te wend om dit moontlik te maak om die neiging van die wet van Moore te kan voortsit en hierdie verlaagde kadens teen te werk. Dit beteken dat die tradisionele manier van rekenaarstelsel bestuur ook hersien moet word om die implementering van parallelle stelsels te vergemaklik. Hierdie projek het die einddoel om ’n hardeware argitektuur te ontwikkel wat die oplossing van elektromagnetiese probleme met behulp van die Moment Metode (MoM) formulering op FPGAs optimeer. Hierdie doel kan bereik word deur van die inherente eienskappe van die MoM formulering wat voorsiening maak vir parallelle berekening van onafhanklike afdelings gebruik te maak. Hierdie onafhanklike afdelings kan in parallel uitgevoer word met behulp van die toegewyde berekening eenhede van die FPGA. FPGAs en herkonfigureerbare stelsels bied ’n kombinasie van van hoë rekenaarkrag en die gemak vir toepassings in berekening. Ons mik om die herkonfigureerbare struktuur van die FPGA aan te wend om die ontwikkeling van die hardeware-argitektuur te vergemaklik. Die konfigureerbare interkonneksies van die FPGA stel ons ook in staat om die FPGA hulpbronne op so ’n manier aan te wend om die toepaslike berekeninge te optimeer en dus berekeningstyd te verminder. Masters 2021-10-12T07:39:33Z 2021-12-22T14:16:23Z 2021-10-12T07:39:33Z 2021-12-22T14:16:23Z 2021-12 Thesis http://hdl.handle.net/10019.1/123696 en_ZA Stellenbosch University 100 pages application/pdf Stellenbosch : Stellenbosch University
spellingShingle UCTD
Transistors
Moore's law
Technological innovations -- Forecasting
Field Programmable Gate Array
Programmable logic devices
Mnisi, Caleb
Accelerating the method of moments implementation on FPGA hardware
title Accelerating the method of moments implementation on FPGA hardware
title_full Accelerating the method of moments implementation on FPGA hardware
title_fullStr Accelerating the method of moments implementation on FPGA hardware
title_full_unstemmed Accelerating the method of moments implementation on FPGA hardware
title_short Accelerating the method of moments implementation on FPGA hardware
title_sort accelerating the method of moments implementation on fpga hardware
topic UCTD
Transistors
Moore's law
Technological innovations -- Forecasting
Field Programmable Gate Array
Programmable logic devices
url http://hdl.handle.net/10019.1/123696
work_keys_str_mv AT mnisicaleb acceleratingthemethodofmomentsimplementationonfpgahardware