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Design of a 4-bit superconductor electronics processor, Rosetta1-4b
Thesis (MEng)--Stellenbosch University, 2023.
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| Format: | Thesis |
| Language: | en_ZA en_ZA |
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Stellenbosch : Stellenbosch University
2023
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| _version_ | 1867614088998158336 |
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| access_status_str | Open Access |
| author | Cishugi, Elijah |
| author2 | Fourie, Coenrad |
| author_browse | Cishugi, Elijah Fourie, Coenrad |
| author_facet | Fourie, Coenrad Cishugi, Elijah |
| author_sort | Cishugi, Elijah |
| collection | Thesis |
| dc_rights_str_mv | Stellenbosch University |
| description | Thesis (MEng)--Stellenbosch University, 2023. |
| format | Thesis |
| id | oai:scholar.sun.ac.za:10019.1/128949 |
| institution | Stellenbosch University (South Africa) |
| language | en_ZA en_ZA |
| last_indexed | 2026-06-10T12:46:29.473Z |
| license_str | Other — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from SUNScholar — Stellenbosch University Repository |
| publishDate | 2023 |
| publishDateRange | 2023 |
| publishDateSort | 2023 |
| publisher | Stellenbosch : Stellenbosch University |
| publisherStr | Stellenbosch : Stellenbosch University |
| record_format | dspace |
| source_str | SUNScholar — Stellenbosch University Repository |
| spelling | oai:scholar.sun.ac.za:10019.1/128949 Design of a 4-bit superconductor electronics processor, Rosetta1-4b Cishugi, Elijah Fourie, Coenrad Stellenbosch University. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. Superconductors Digital electronics Artificial intelligence Cloud computing Cloud computing Global energy consumption. Supercomputers Thesis (MEng)--Stellenbosch University, 2023. ENGLISH ABSTRACT: In the pursuit of the next-generation integrated circuit technology, Rapid Single-Flux Quantum (RSFQ) logic presents a compelling alternative to traditional CMOS, offering ultra-high-speed and ultra-low power consumption. This thesis presents the design and demonstration of a 4-bit superconductor electronics RSFQ processor, Rosetta1-4b. Utilizing a bit-parallel synchronous architecture, the processor incorporates an instruction set of fourteen distinct instructions. The design leverages an existing superconductor RSFQ logic cell library to implement a multicycle pipelined processor microarchitecture, comprising five pipeline stages. The processor is placed, routed and fully laid out in the MIT-Lincoln laboratory SFQ5ee fabrication process. We assess the design through SPICE simulations of the processor running small, general-purpose, stored programs. Simulation results confirm the processor’s correct operation at peak global clock frequencies of 40 GHz pre-layout and 14.3 GHz post-layout. The static and dynamic power consumptions are measured to be 4.84 mW and 37.21 μW, respectively. The proposed processor contains 1742 gates, 14596 Josephson junctions, and achieves an energy efficiency of 0.454 TOPS/w (tera-operations per watt). The findings of this study substantiate the viability of RSFQ logic as a robust candidate for future integrated circuit technology. AFRIKAANSE OPSOMMING: In die strewe na die volgende generasie ge¨ıntegreerde stroombaan tegnologie, bied Rapid Single-Flux Quantum (RSFQ) logika ’n ernstige alternatief tot tradisionele CMOS in terme van ultra-o¨espoed skakeling en ultra-lae energieverbruik. Hierdie tesis bied die ontwerp en demonstrasie aan van ’n 4-bis supergeleier elektroniese RSFQ verwerker, Rosetta1-4b. Die verwerker gebruik ’n bis-parallelle sinkrone argitektuur en bevat ’n instruksiestel van veertien afsonderlike instruksies. Die ontwerp maak gebruik van ’n bestaande supergeleier RSFQ logika sel iblioteek om ’n veelsiklus pyplynverwerker mikroargitektuur, bestaande uit vyf pyplynstadiums, te implementeer. Die verwerker word vir die MIT Lincoln Laboratory SFQ5ee vervaardigingsproses uitgelˆe. Ons assesseer die ontwerp deur SPICE simulasies van die verwerker wat klein, algemene, gestoorde programme laat loop. Simulasieresultate bevestig die verwerker se korrekte werking by piek globale klokfrekwensies van 40 GHz pre-uitleg en 14,3 GHz na-uitleg. Die statiese en dinamiese kragverbruik word gemeet as 4,84 mW en 37,21 μW, onderskeidelik. Die voorgestelde verwerker bevat 1742 hekke, 14596 Josephson-vlakke, en bereik ’n energiedoeltreffendheid van 0,454 TOPS/w (tera-operasies per watt). Die bevindinge van hierdie studie staaf die lewensvatbaarheid van RSFQ-logika as ’n robuuste kandidaat vir toekomstige ge¨ıntegreerde stroombaantegnologie. Masters 2023-11-21T09:42:47Z 2024-01-08T16:54:33Z 2023-11-21T09:42:47Z 2024-01-08T16:54:33Z 2023-12 Thesis https://scholar.sun.ac.za/handle/10019.1/128949 en_ZA en_ZA Stellenbosch University xvi, 129 pages : illustrations application/pdf Stellenbosch : Stellenbosch University |
| spellingShingle | Superconductors Digital electronics Artificial intelligence Cloud computing Cloud computing Global energy consumption. Supercomputers Cishugi, Elijah Design of a 4-bit superconductor electronics processor, Rosetta1-4b |
| title | Design of a 4-bit superconductor electronics processor, Rosetta1-4b |
| title_full | Design of a 4-bit superconductor electronics processor, Rosetta1-4b |
| title_fullStr | Design of a 4-bit superconductor electronics processor, Rosetta1-4b |
| title_full_unstemmed | Design of a 4-bit superconductor electronics processor, Rosetta1-4b |
| title_short | Design of a 4-bit superconductor electronics processor, Rosetta1-4b |
| title_sort | design of a 4 bit superconductor electronics processor rosetta1 4b |
| topic | Superconductors Digital electronics Artificial intelligence Cloud computing Cloud computing Global energy consumption. Supercomputers |
| url | https://scholar.sun.ac.za/handle/10019.1/128949 |
| work_keys_str_mv | AT cishugielijah designofa4bitsuperconductorelectronicsprocessorrosetta14b |