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Parameter extraction of superconducting integrated circuits
Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006.
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| Other Authors: | |
| Format: | Thesis |
| Language: | English |
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Stellenbosch : University of Stellenbosch
2008
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| _version_ | 1867613780592033792 |
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| access_status_str | Open Access |
| author | Lotter, Pierre |
| author2 | Perold, W. J. |
| author_browse | Lotter, Pierre Perold, W. J. |
| author_facet | Perold, W. J. Lotter, Pierre |
| author_sort | Lotter, Pierre |
| collection | Thesis |
| dc_rights_str_mv | University of Stellenbosch |
| description | Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006. |
| format | Thesis |
| id | oai:scholar.sun.ac.za:10019.1/1652 |
| institution | Stellenbosch University (South Africa) |
| language | English |
| last_indexed | 2026-06-10T12:41:35.119Z |
| license_str | Other — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from SUNScholar — Stellenbosch University Repository |
| publishDate | 2008 |
| publishDateRange | 2008 |
| publishDateSort | 2008 |
| publisher | Stellenbosch : University of Stellenbosch |
| publisherStr | Stellenbosch : University of Stellenbosch |
| record_format | dspace |
| source_str | SUNScholar — Stellenbosch University Repository |
| spelling | oai:scholar.sun.ac.za:10019.1/1652 Parameter extraction of superconducting integrated circuits Lotter, Pierre Perold, W. J. University of Stellenbosch. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. Superconductivity Dissertations -- Electronic engineering Theses -- Electronic engineering Electrical and Electronic Engineering Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2006. Integrated circuits are expensive to manufacture and it is important to verify the correct operation of a circuit before fabrication. Efficient, though accurate, parameter extraction of post-layout designs are required for estimation of circuit success rates. This thesis discusses electrical netlist and fast parameter extraction techniques suited for both intraand inter-gate connections. This includes the use of extraction windows and look-up tables (LUTs) for accurate inductance and capacitance estimation. These techniques can readily be implemented in automated layout software where fast parameter extraction is required for timing analysis and gate placement. 2008-02-05T09:45:36Z 2010-06-01T08:29:46Z 2008-02-05T09:45:36Z 2010-06-01T08:29:46Z 2006-12 Thesis http://hdl.handle.net/10019.1/1652 en University of Stellenbosch 1408363 bytes application/pdf application/pdf Stellenbosch : University of Stellenbosch |
| spellingShingle | Superconductivity Dissertations -- Electronic engineering Theses -- Electronic engineering Electrical and Electronic Engineering Lotter, Pierre Parameter extraction of superconducting integrated circuits |
| title | Parameter extraction of superconducting integrated circuits |
| title_full | Parameter extraction of superconducting integrated circuits |
| title_fullStr | Parameter extraction of superconducting integrated circuits |
| title_full_unstemmed | Parameter extraction of superconducting integrated circuits |
| title_short | Parameter extraction of superconducting integrated circuits |
| title_sort | parameter extraction of superconducting integrated circuits |
| topic | Superconductivity Dissertations -- Electronic engineering Theses -- Electronic engineering Electrical and Electronic Engineering |
| url | http://hdl.handle.net/10019.1/1652 |
| work_keys_str_mv | AT lotterpierre parameterextractionofsuperconductingintegratedcircuits |