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The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation
Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2010.
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| Format: | Thesis |
| Language: | English |
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Stellenbosch : University of Stellenbosch
2010
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| _version_ | 1867613956159307776 |
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| access_status_str | Open Access |
| author | Booysen, Samuel |
| author2 | De Swardt, J. B. |
| author_browse | Booysen, Samuel De Swardt, J. B. |
| author_facet | De Swardt, J. B. Booysen, Samuel |
| author_sort | Booysen, Samuel |
| collection | Thesis |
| dc_rights_str_mv | University of Stellenbosch |
| description | Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2010. |
| format | Thesis |
| id | oai:scholar.sun.ac.za:10019.1/4107 |
| institution | Stellenbosch University (South Africa) |
| language | English |
| last_indexed | 2026-06-10T12:44:22.712Z |
| license_str | Other — see source repository |
| provenance_str_mv | Harvested via OAI-PMH from SUNScholar — Stellenbosch University Repository |
| publishDate | 2010 |
| publishDateRange | 2010 |
| publishDateSort | 2010 |
| publisher | Stellenbosch : University of Stellenbosch |
| publisherStr | Stellenbosch : University of Stellenbosch |
| record_format | dspace |
| source_str | SUNScholar — Stellenbosch University Repository |
| spelling | oai:scholar.sun.ac.za:10019.1/4107 The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation Booysen, Samuel De Swardt, J. B. University of Stellenbosch. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. QPSK demodulator Synchronization algorithms Carrier recovery Symbol synchronization Dissertations -- Electronic engineering Theses -- Electronic engineering Quadrature Phase Shift Keying Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2010. ENGLISH ABSTRACT: This thesis describes the design and implementation of a software based QPSK demodulator with a demodulation speed of 100 Mbps. The objective of the thesis was to identify a topology for the QPSK demodulator that would allow for high data rates and the design of the synchronization algorithms for carrier and symbol recovery. The QPSK demodulator was implemented on an Altera Stratix II field programmable gate array (FPGA), which does complex I and Q sampling on a down converted 720 MHz QPSK signal. The I and Q down converted baseband signals are sent through matched filters which are implemented with discrete components to maximize the signal to noise ratio of the received rectangular baseband pulses. A 1 GSPS direct digital synthesizer (DDS) is used to generate the synchronous clock for the analog to digital converters which samples the matched filter outputs. The demodulator uses two samples per symbol to demodulate the QPSK signal. A dual locking system is implemented to have a wide pre-locking filter for symbol synchronization and a narrow band post-lock filter to minimize the loop noise. A symbol lock detection algorithm decides when the symbol recovery loop is locked and switches between the loop filters. A second 1 GSPS DDS output is mixed with a local oscillator to generate the 1.44 GHz LO signal for the quadrature down conversion. The carrier recovery loop uses a numerically controlled oscillator inside the FPGA for initial carrier acquisition which allows for very wide locking bandwidth. After lock is achieved, the external carrier recovery loop takes over and removes any frequency offset in the complex baseband signal by changing the frequency of the DDS. A QPSK modulator was also developed to provide a QPSK signal with known data. The modulator can generate any constellation diagram up to 256 points. AFRIKAANSE OPSOMMING: Hierdie tesis bespreek die ontwerp en implementasie van ’n sagteware gebaseerde QPSK demodulator met ’n demodulasie spoed van 100 Mbps. Die doelstelling is om ’n topologie te identifiseer vir ’n QPSK demodulator wat ’n hoë datatempo sal toelaat en ook om sinkronisasie algoritmes te ontwikkel vir draer en simbool herkenning. Die QPSK demodulator is geïmplimenteer op ’n Stratix II FPGA van Altera wat kompleks basisband monstering doen op infase en kwadratuur basisband seine. Die basisband seine word gegenereer van ’n 720 MHz QPSK sein met ’n kwadratuur menger wiese uittrees deur puls passende filters gestuur word om die sein tot ruis verhouding te maksimeer. ’n Een gigamonster per sekonde direk digitale sintetiseerder (DDS) is gebruik om die klok vir die analoog na digitaal omsetters te genereer vir sinkrone monstering van die pulse passende filter uittrees. Die demodulator gebruik twee monsters per simbool om ’n QPSK sein te demoduleer. ’n Tweevoudige sluit algoritme word gebruik vir die simbool sinkronisasie waar ’n wyeband filter die inisiële sluit funksie verrig en dan word daar oorgeslaan na ’n nouband filter vir fase volging wat die ruis in die terugvoerlus verminder. Daar is ’n simbool sluit detektor wat identifiseer wanneer die simbool beheerlus gesluit is en selekteer dan die gepaste filter. ’n Tweede DDS en ’n sintetiseerder se uittrees word gemeng om ’n 1.44 GHz draer te genereer vir kohurente frekwensie translasie in die kwadratuur menger. Die draer sinkronisasie gebruik ’n numeries beheerbare ossilator vir die inisiële frekwensie en fase sluit wat baie vinnig geimplenteer kan word omdat dit alles in sagteware binne in die FPGA gebeur. Na die interne draer beheerlus gesluit is, neem die eksterne beheerlus oor om enige fase of frekwensie afsette in die kompleks basisband seine van die kwadratuur menger te verwyder deur die frekwensie van die draer DDS te beheer. ’n QPSK modulator is ook ontwikkel om verwysings data te genereer. Enige konstelasie vorm tot 256 punte kan geimplementeer word. 2010-02-22T10:11:03Z 2010-08-13T14:59:08Z 2010-02-22T10:11:03Z 2010-08-13T14:59:08Z 2010-03 Thesis http://hdl.handle.net/10019.1/4107 en University of Stellenbosch 95 p. : ill. application/pdf Stellenbosch : University of Stellenbosch |
| spellingShingle | QPSK demodulator Synchronization algorithms Carrier recovery Symbol synchronization Dissertations -- Electronic engineering Theses -- Electronic engineering Quadrature Phase Shift Keying Booysen, Samuel The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation |
| title | The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation |
| title_full | The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation |
| title_fullStr | The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation |
| title_full_unstemmed | The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation |
| title_short | The design of a high speed topology for a QPSK demodulator with emphasis on the synchronization algorithms needed for demodulation |
| title_sort | design of a high speed topology for a qpsk demodulator with emphasis on the synchronization algorithms needed for demodulation |
| topic | QPSK demodulator Synchronization algorithms Carrier recovery Symbol synchronization Dissertations -- Electronic engineering Theses -- Electronic engineering Quadrature Phase Shift Keying |
| url | http://hdl.handle.net/10019.1/4107 |
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