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A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique
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| Published in: | IEEE Access |
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| Format: | Online Article RSS Article |
| Published: |
2026
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| _version_ | 1864030192705470464 |
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| collection | WordPress RSS FRELIP Feed Integration |
| container_title | IEEE Access |
| description | |
| discipline_display | Technology & Engineering |
| discipline_facet | Technology & Engineering |
| format | Online Article RSS Article |
| genre | Journal Article |
| id | rss_article:45766 |
| institution | FRELIP |
| journal_source_facet | IEEE Access |
| publishDate | 2026 |
| publishDateSort | 2026 |
| record_format | rss_article |
| spellingShingle | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique Computer Sciience Technology & Engineering — Computing Technology & Engineering |
| sub_discipline_display | Technology & Engineering — Computing |
| sub_discipline_facet | Technology & Engineering — Computing |
| subject_display | Computer Sciience Technology & Engineering — Computing Technology & Engineering Computer Sciience Technology & Engineering — Computing Technology & Engineering |
| subject_facet | Computer Sciience Technology & Engineering — Computing Technology & Engineering |
| title | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique |
| title_auth | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique |
| title_full | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique |
| title_fullStr | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique |
| title_full_unstemmed | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique |
| title_short | A Cost-Efficient LDO Regulator Using a Dual-Loop Low-Impedance Buffer and a PT-Compensated Bias Based on the Current-Subtraction Technique |
| title_sort | a cost-efficient ldo regulator using a dual-loop low-impedance buffer and a pt-compensated bias based on the current-subtraction technique |
| topic | Computer Sciience Technology & Engineering — Computing Technology & Engineering |
| url | http://ieeexplore.ieee.org/document/11483100 |