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Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic
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| Published in: | Logical Methods in Computer Science |
|---|---|
| Format: | Online Article RSS Article |
| Published: |
2015
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| Subjects: | |
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| _version_ | 1864030186914185219 |
|---|---|
| collection | WordPress RSS FRELIP Feed Integration |
| container_title | Logical Methods in Computer Science |
| description | |
| discipline_display | Engineering & Technology |
| discipline_facet | Engineering & Technology |
| format | Online Article RSS Article |
| genre | Journal Article |
| id | rss_article:6127 |
| institution | FRELIP |
| journal_source_facet | Logical Methods in Computer Science |
| publishDate | 2015 |
| publishDateSort | 2015 |
| record_format | rss_article |
| spellingShingle | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic Computer Science & Information Science Computer Science & IT Engineering & Technology |
| sub_discipline_display | Computer Science & IT |
| sub_discipline_facet | Computer Science & IT |
| subject_display | Computer Science & Information Science Computer Science & IT Engineering & Technology Computer Science & Information Science Computer Science & IT Engineering & Technology |
| subject_facet | Computer Science & Information Science Computer Science & IT Engineering & Technology |
| title | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic |
| title_auth | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic |
| title_full | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic |
| title_fullStr | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic |
| title_full_unstemmed | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic |
| title_short | Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic |
| title_sort | formal design of asynchronous fault detection and identification components using temporal epistemic logic |
| topic | Computer Science & Information Science Computer Science & IT Engineering & Technology |
| url | https://doi.org/10.2168/LMCS-11(4:4)2015 |