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Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths

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Published in:IEEE Access
Format: Online Article RSS Article
Published: 2026
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container_title IEEE Access
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discipline_display Computer Sciience
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journal_source_facet IEEE Access
last_indexed 2026-06-20T21:39:40.457Z
publishDate 2026
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spellingShingle Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
Computer Sciience
General
Computer Sciience
sub_discipline_display General
sub_discipline_facet General
subject_display Computer Sciience
General
Computer Sciience
subject_facet Computer Sciience
General
Computer Sciience
title Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_alt Identificación de red de inductancia parásita basada en mediciones para módulos de potencia multichip basada en matriz de inductancia de rutas de cableado de bucle
Identification du réseau d'inductances parasites basée sur la mesure pour les modules de puissance multipuces basée sur la matrice d'inductance des chemins de boucle de câblage
Identificação de Rede de Indutância Parasita Baseada em Medição para Módulos de Potência Multichip Baseada na Matriz de Indutância de Caminhos de Fiação de Loop
title_auth Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_es_txt Identificación de red de inductancia parásita basada en mediciones para módulos de potencia multichip basada en matriz de inductancia de rutas de cableado de bucle
title_fr_txt Identification du réseau d'inductances parasites basée sur la mesure pour les modules de puissance multipuces basée sur la matrice d'inductance des chemins de boucle de câblage
title_full Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_fullStr Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_full_unstemmed Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_pt_txt Identificação de Rede de Indutância Parasita Baseada em Medição para Módulos de Potência Multichip Baseada na Matriz de Indutância de Caminhos de Fiação de Loop
title_short Measurement-Based Parasitic Inductance Network Identification for Multichip Power Modules Based on Inductance Matrix of Loop Wiring Paths
title_sort measurement-based parasitic inductance network identification for multichip power modules based on inductance matrix of loop wiring paths
topic Computer Sciience
General
Computer Sciience
url http://ieeexplore.ieee.org/document/11538136