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Firmware and gateway for the ACE1 reconfigurable accelerator card

This thesis describes the continued work on the in-house designed FPGA based co-processor daughtercard referred to as ACE1. The aim: to create an ecosystem incorporating firmware, bootstrapping code, drivers and a development environment to create a seamless environment. Challenges in setting up and...

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Main Author: Thorne, Nicholas James
Format: Thesis
Language:English
Published: Department of Electrical Engineering 2015
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access_status_str Open Access
author Thorne, Nicholas James
author_browse Thorne, Nicholas James
author_facet Thorne, Nicholas James
author_sort Thorne, Nicholas James
collection Thesis
description This thesis describes the continued work on the in-house designed FPGA based co-processor daughtercard referred to as ACE1. The aim: to create an ecosystem incorporating firmware, bootstrapping code, drivers and a development environment to create a seamless environment. Challenges in setting up and debugging the interface that connects the coprocessor daughtercard to the host server include: problems with the power network, the edge connectors and timing problems with the primary protocol which prevented host-based communications. The options include allowing the daughtercard to function in a stand-alone fashion and we present a gateware solution that allows users to select from a number of alternatives for each of the layers in the Open Systems Interconnect networking model.
format Thesis
id oai:open.uct.ac.za:11427/10926
institution University of Cape Town (South Africa)
language eng
last_indexed 2026-06-10T12:42:34.096Z
license_str Not specified — see source repository
provenance_str_mv Harvested via OAI-PMH from UCTD — University of Cape Town Open Access Repository
publishDate 2015
publishDateRange 2015
publishDateSort 2015
publisher Department of Electrical Engineering
publisherStr Department of Electrical Engineering
record_format dspace
source_str UCTD — University of Cape Town Open Access Repository
spelling oai:open.uct.ac.za:11427/10926 Firmware and gateway for the ACE1 reconfigurable accelerator card Thorne, Nicholas James Electrical Engineering This thesis describes the continued work on the in-house designed FPGA based co-processor daughtercard referred to as ACE1. The aim: to create an ecosystem incorporating firmware, bootstrapping code, drivers and a development environment to create a seamless environment. Challenges in setting up and debugging the interface that connects the coprocessor daughtercard to the host server include: problems with the power network, the edge connectors and timing problems with the primary protocol which prevented host-based communications. The options include allowing the daughtercard to function in a stand-alone fashion and we present a gateware solution that allows users to select from a number of alternatives for each of the layers in the Open Systems Interconnect networking model. 2015-01-02T08:53:53Z 2015-01-02T08:53:53Z 2011 Master Thesis Masters MSc http://hdl.handle.net/11427/10926 eng application/pdf Department of Electrical Engineering Faculty of Engineering and the Built Environment University of Cape Town
spellingShingle Electrical Engineering
Thorne, Nicholas James
Firmware and gateway for the ACE1 reconfigurable accelerator card
thesis_degree_str Master's
title Firmware and gateway for the ACE1 reconfigurable accelerator card
title_full Firmware and gateway for the ACE1 reconfigurable accelerator card
title_fullStr Firmware and gateway for the ACE1 reconfigurable accelerator card
title_full_unstemmed Firmware and gateway for the ACE1 reconfigurable accelerator card
title_short Firmware and gateway for the ACE1 reconfigurable accelerator card
title_sort firmware and gateway for the ace1 reconfigurable accelerator card
topic Electrical Engineering
url http://hdl.handle.net/11427/10926
work_keys_str_mv AT thornenicholasjames firmwareandgatewayfortheace1reconfigurableacceleratorcard