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| Published in: | IEEE Journal of the Electron Devices Society |
|---|---|
| Format: | Online Article RSS Article |
| Published: |
2026
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| Subjects: | |
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| _version_ | 1864030190572666885 |
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| collection | WordPress RSS FRELIP Feed Integration |
| container_title | IEEE Journal of the Electron Devices Society |
| description | |
| discipline_display | Technology & Engineering |
| discipline_facet | Technology & Engineering |
| format | Online Article RSS Article |
| genre | Journal Article |
| id | rss_article:31142 |
| institution | FRELIP |
| journal_source_facet | IEEE Journal of the Electron Devices Society |
| publishDate | 2026 |
| publishDateSort | 2026 |
| record_format | rss_article |
| spellingShingle | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory Electronics Technology & Engineering — Aerospace & Applied Tech Technology & Engineering |
| sub_discipline_display | Technology & Engineering — Aerospace & Applied Tech |
| sub_discipline_facet | Technology & Engineering — Aerospace & Applied Tech |
| subject_display | Electronics Technology & Engineering — Aerospace & Applied Tech Technology & Engineering Electronics Technology & Engineering — Aerospace & Applied Tech Technology & Engineering |
| subject_facet | Electronics Technology & Engineering — Aerospace & Applied Tech Technology & Engineering |
| title | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory |
| title_auth | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory |
| title_full | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory |
| title_fullStr | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory |
| title_full_unstemmed | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory |
| title_short | Low-Power Stack-Level Programming Enabled by Optimized Dummy Word Line Voltage in 3-D NAND Flash Memory |
| title_sort | low-power stack-level programming enabled by optimized dummy word line voltage in 3-d nand flash memory |
| topic | Electronics Technology & Engineering — Aerospace & Applied Tech Technology & Engineering |
| url | http://ieeexplore.ieee.org/document/11367431 |