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CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs

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Published in:ArXiv cs.IR Recent Papers
Format: Online Article RSS Article
Published: 2026
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spellingShingle CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
ArXiv cs.IR Recent Papers
Library Science
Library & Information Science
sub_discipline_display Library Science
sub_discipline_facet Library Science
subject_display ArXiv cs.IR Recent Papers
Library Science
Library & Information Science
ArXiv cs.IR Recent Papers
Library Science
Library & Information Science
subject_facet ArXiv cs.IR Recent Papers
Library Science
Library & Information Science
title CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
title_auth CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
title_full CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
title_fullStr CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
title_full_unstemmed CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
title_short CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs
title_sort ccd-level and load-aware thread orchestration for in-memory vector anns on multi-core cpus
topic ArXiv cs.IR Recent Papers
Library Science
Library & Information Science
url https://arxiv.org/abs/2605.10090v1